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#address-cells#size-cellsinterrupt-parentmodelcompatibleethernet0serial0serial1device_typecci-control-portclock-frequencyenable-methodreginterruptsarm,cpu-registers-not-fw-configuredranges#clock-cellsclock-output-namesphandleclock-divclock-multclocksclock-indicesallwinner,pipelinesstatusinterrupt-namesclock-namesresetsreset-namessnps,pblsnps,fixed-burstsnps,force_sf_dma_modepinctrl-namespinctrl-0phy-handlephy-modephy-supplyphysphy-names#phy-cellsphy_type#reset-cellsvmmc-supplybus-widthcd-gpiosvqmmc-supplymmc-pwrseqnon-removablecap-mmc-hw-resetinterrupt-controller#interrupt-cellsinterface-typeremote-endpointgpio-controller#gpio-cellsvcc-pa-supplyvcc-pb-supplyvcc-pc-supplyvcc-pd-supplyvcc-pe-supplyvcc-pf-supplyvcc-pg-supplyvcc-ph-supplypinsfunctiondrive-strengthbias-pull-upreg-shiftreg-io-widthvcc-pl-supplyvcc-pm-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-namebldoin-supplyregulator-enable-ramp-delaystdout-pathlabelenable-active-highgpioreset-gpios