� ��j�8c8(�cQualcomm APQ8074 Dragonboard&!qcom,apq8074-dragonboardqcom,apq8074,reserved-memory=mpss@8000000DHmba@d100000D Hreserved@d200000D �Hadsp@dc00000D ��HOvenus@f500000DPPHsmem@fa00000D� HOtz@fc00000D�Hrfsa@fd60000D�Hrmtfs@fd80000D�Hcpus W cpu@0 !qcom,kraitbqcom,kpss-acc-v2pcpuD|���OBcpu@1 !qcom,kraitbqcom,kpss-acc-v2pcpuD|���ODcpu@2 !qcom,kraitbqcom,kpss-acc-v2pcpuD|�� �OFcpu@3 !qcom,kraitbqcom,kpss-acc-v2pcpuD|� � �OHl2-cache!cache�� Oidle-statesspc#!qcom,idle-state-spcarm,idle-state������OmemorypmemoryDthermal-zonescpu-thermal0��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-thermal1��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-thermal2��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-thermal3��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-pmu!qcom,krait-pmu Wclocksxo_board !fixed-clock8E$�Osleep_clk !fixed-clock8E�timer!arm,armv7-timer0WE$�adsp-pil!qcom,msm8974-adsp-pil@U�#iwdogfatalreadyhandoverstop-acky��xo���stopsmem !qcom,smem���smp2p-adsp !qcom,smp2p���, W� � �master-kernelmaster-kernel&Oslave-kernel slave-kernel=ROsmp2p-modem !qcom,smp2p���, W ��master-kernelmaster-kernel&slave-kernel slave-kernel=Rsmp2p-wcnss !qcom,smp2p���, W� ��master-kernelmaster-kernel&slave-kernel slave-kernel=Rsmsm !qcom,smsm c  n  yapps@0D&modem@1D W=Radsp@2D W�=Rwcnss@7D W�=Rfirmwarescm !qcom,scm�����corebusifacesoc= !simple-businterrupt-controller@f9000000!qcom,msm-qgic2=RD�� Osyscon@f9011000!sysconD�Oqfprom@fc4bc000 !qcom,qfpromD�K�calib@d0D�Obackup@440D@Othermal-sensor@fc4a9000!qcom,msm8974-tsensD�J��J���calibcalib_backup� �O timer@f9020000=!arm,armv7-timer-memD�E$�frame@f9021000�WD�� frame@f9023000� W D�0 �disabledframe@f9024000� W D�@ �disabledframe@f9025000� W D�P �disabledframe@f9026000� W D�` �disabledframe@f9027000� W D�p �disabledframe@f9028000� WD�� �disabledpower-controller@f9089000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D����Opower-controller@f9099000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D� ���Opower-controller@f90a9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D� ���O power-controller@f90b9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D� ���O power-controller@f9012000 !qcom,saw2D� �O clock-controller@f9088000!qcom,kpss-acc-v2D����Oclock-controller@f9098000!qcom,kpss-acc-v2D� ���Oclock-controller@f90a8000!qcom,kpss-acc-v2D� ���Oclock-controller@f90b8000!qcom,kpss-acc-v2D� ���O restart@fc4ab000 !qcom,psholdD�J�clock-controller@fc400000!qcom,gcc-msm89748��D�@@Osyscon@fd4a0000!sysconD�JO$syscon@fd484000!sysconD�H@ Oclock-controller@fd8c0000!qcom,mmcc-msm89748��D��`OJtcsr-mutex!qcom,tcsr-mutex � Omemory@fc428000!qcom,rpm-msg-ramD�B�@Oserial@f991d000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD��� Wk�eW �coreiface �disabledserial@f991e000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD��� Wl�gW �coreiface�oksdhci@f9824900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4D��I��@hc_memcore_memW{�ihc_irqpwr_irq����coreifacexo�ok#-;GTdefaultbsdhci@f9864900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4D��I��@hc_memcore_memW�ihc_irqpwr_irq����coreifacexo �disabledsdhci@f98a4900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4D��I��@hc_memcore_memW}�ihc_irqpwr_irq����coreifacexo�ok l>Tdefaultb #;!G"usb@f9a55000 !qcom,ci-hdrcD��P��R W��  �ifacecoreu �xh�� �core�ulpi�otg��usb-phy�ok��# �$��%&�'�O(ulpiphy@a(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phy  � �refsleep� (�phypor �disabledphy@b(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phy  � �refsleep� (�phypor�ok+)7*�%CcO#rng@f9bff000 !qcom,prngD������corepinctrl@fd510000!qcom,msm8974-pinctrlD�Q@Qa=R W�Oi2c11O,muxmgpio83gpio84 rblsp_i2c11spi8_defaultmosimgpio45 rblsp_spi8misomgpio46 rblsp_spi8csmgpio47 rblsp_spi8clkmgpio48 rblsp_spi8sdhc1-pin-activeOclk msdc1_clk{�cmd-datamsdc1_cmdsdc1_data{ �sdhc2-cd-pin-activemgpio62rgpio{�O sdhc2-pin-activeOclk msdc2_clk{ �cmd-datamsdc2_cmdsdc2_data{�i2c@f9923000 �disabled!qcom,i2c-qup-v2.1.1D��0 W_�YW �coreifacei2c@f9924000 �disabled!qcom,i2c-qup-v2.1.1D��@ W`�[W �coreifacei2c@f9925000 �disabled!qcom,i2c-qup-v2.1.1D��P Wa�]W �coreifacei2c@f9964000 �disabled!qcom,i2c-qup-v2.1.1D��@ Wf�uq �coreifacei2c@f9967000�okay!qcom,i2c-qup-v2.1.1D��p Wi�{q �coreiface�++�txrxE @b,Tdefaulteeprom@52 !atmel,24c128DR� �i2c@f9968000 �disabled!qcom,i2c-qup-v2.1.1D��� Wj�}q �coreifacespmi@fc4cf000!qcom,spmi-pmic-arbcoreintrcnfgD�L��L��L� iperiph_irq W���=Rpm8841@4!qcom,pm8841qcom,spmi-pmicDmpps@a000!qcom,pm8841-mppqcom,spmi-mppD�Qa@W����temp-alarm@2400!qcom,spmi-temp-alarmD$W$pm8841@5!qcom,pm8841qcom,spmi-pmicDpm8941@0!qcom,pm8941qcom,spmi-pmicDrtc@6000!qcom,pm8941-rtcD`a rtcalarmWapwrkey@800!qcom,pm8941-pwrkeyDW�= �misc@900!qcom,pm8941-miscD W iusb_idO&charger@1000!qcom,pm8941-chargerD�WOichg-donechg-fastchg-trklbat-temp-okbat-presentchg-goneusb-validdc-valid�-O%otg-vbusO'gpios@c000 !qcom,pm8941-gpioqcom,spmi-gpioD�Q�.$a=RO.boost-bypassmgpio21rnormalOQmpps@a000!qcom,pm8941-mppqcom,spmi-mppD�Qa�W��������temp-alarm@2400!qcom,spmi-temp-alarmD$W$/thermal�vadc@3100!qcom,spmi-vadcD1W1O/bat_tempD0die_tempDref_625mvD ref_1250vD ref_gndDref_vddDvbat_snsDiadc@3600 !qcom,pm8941-iadcqcom,spmi-iadcD6W61'coincell@2800!qcom,pm8941-coincellD( �disabledpm8941@1!qcom,pm8941qcom,spmi-pmicDwled@d800!qcom,pm8941-wledD� Sbacklight �disabledregulators!qcom,pm8941-regulators W��iocp-5vs1ocp-5vs2Y0s4hLK@�LK@��O05vs1����� �0O-dma-controller@f9944000!qcom,bam-v1.4.0D��@� W��q�bam_clkG�O+etr@fc322000 !arm,coresight-tmcarm,primecellD�2 �11 �apb_pclkatclkin-portsportendpointR2O4tpiu@fc318000!!arm,coresight-tpiuarm,primecellD�1��11 �apb_pclkatclkin-portsportendpointR3O5replicator@fc31c000/!arm,coresight-dynamic-replicatorarm,primecellD�1��11 �apb_pclkatclkout-portsport@0DendpointR4O2port@1DendpointR5O3in-portsportendpointR6O7etf@fc307000 !arm,coresight-tmcarm,primecellD�0p�11 �apb_pclkatclkout-portsportendpointR7O6in-portsportendpointR8O:funnel@fc31b000+!arm,coresight-dynamic-funnelarm,primecellD�1��11 �apb_pclkatclkin-portsport@1DendpointR9O<out-portsportendpointR:O8funnel@fc31a000+!arm,coresight-dynamic-funnelarm,primecellD�1��11 �apb_pclkatclkin-portsport@5DendpointR;OAout-portsportendpointR<O9funnel@fc345000+!arm,coresight-dynamic-funnelarm,primecellD�4P�11 �apb_pclkatclkin-portsport@0DendpointR=OCport@1DendpointR>OEport@2DendpointR?OGport@3DendpointR@OIout-portsportendpointRAO;etm@fc33c000"!arm,coresight-etm4xarm,primecellD�3��11 �apb_pclkatclkbBout-portsportendpointRCO=etm@fc33d000"!arm,coresight-etm4xarm,primecellD�3��11 �apb_pclkatclkbDout-portsportendpointREO>etm@fc33e000"!arm,coresight-etm4xarm,primecellD�3��11 �apb_pclkatclkbFout-portsportendpointRGO?etm@fc33f000"!arm,coresight-etm4xarm,primecellD�3��11 �apb_pclkatclkbHout-portsportendpointRIO@mdss@fd900000 �disabled !qcom,mdssD����@mdss_physvbif_physfJ�J]J^Jm�ifacebusvsync WH=R=OKmdp@fd900000 �disabled !qcom,mdp5D��  mdp_phys,KW �J]J^JiJm�ifacebuscorevsyncportsport@0DendpointRLONdsi@fd922800 �disabled!qcom,mdss-dsi-ctrlD��(� dsi_ctrl,KWuJ!JtMM8�JiJ]J^J_JkJdJn-�mdp_coreifacebusbytepixelcorecore_mmss�M�dsi-phyportsport@0DendpointRNOLport@1Dendpointdsi-phy@fd922a00 �disabled!qcom,dsi-phy-28nm-hpmD��*���+���-�0"dsi_plldsi_phydsi_phy_regulator8 ��J]�ifaceOMsmd !qcom,smdadsp W� ��modem W � �rpm W� ��rpm_requests!qcom,rpm-msm8974 �rpm_requestsclock-controller!qcom,rpmcc-msm8974qcom,rpmcc8O1pm8841-regulators!qcom,rpm-pm8841-regulatorss1h L���s2h� ��Os3h� ��s4h� ��s5s6s7s8pm8941-regulators!qcom,rpm-pm8941-regulators�O��O�P PY0s1h� �� #7OOs2h �p� �p7OPs3hw@�w@#7Ol1h�(��(#7l2hO��O�l3h�(��(l4h�(��(l5hw@�w@l6hw@�w@7O*l7hw@�w@7l8hw@�w@l9hw@�-pl10hw@�w@#l11h� �� l12hw@�w@#7l13hw@�-p7O"l14hw@�w@l15hG��G�l16h)2��)2�l17h)2��)2�l18h+|��+|�l19h2Z��2Z�#l20h-p�-pI7b @Ol21h-p�-p7O!l22h-���-��l23h-���-��l24h.��.�7O)lvs1lvs2lvs3vreg-boost!regulator-fixed xvreg-boosth0��0�#7 �.�TdefaultbQvreg-vph-pwr!regulator-fixedxvph-pwrh6��6�#aliases�/soc/serial@f991e000�/soc/spmi@fc4cf000/pm8941@0�/soc/spmi@fc4cf000/pm8841@4chosen�serial0:115200n8 #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleinterruptsenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#clock-cellsclock-frequencyinterrupts-extendedinterrupt-namescx-supplyclocksclock-namesmemory-regionqcom,smem-statesqcom,smem-state-namesqcom,rpm-msg-ramhwlocksqcom,smemqcom,ipcqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsqcom,ipc-1qcom,ipc-2qcom,ipc-3nvmem-cellsnvmem-cell-names#qcom,sensors#thermal-sensor-cellsframe-numberstatusregulator#reset-cells#power-domain-cellssyscon#hwlock-cellsreg-namesbus-widthnon-removablevmmc-supplyvqmmc-supplypinctrl-namespinctrl-0cd-gpiosassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modeahb-burst-configphy-namesphysphy-selectextconvbus-supplyhnp-disablesrp-disableadp-disable#phy-cellsv3p3-supplyv1p8-supplyqcom,init-seqgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-disablebias-pull-updmasdma-namespagesizeread-onlyqcom,eeqcom,channeldebounceusb-otg-in-supplygpio-rangesio-channelsio-channel-names#io-channel-cellsqcom,external-resistor-micro-ohmslabelvin_5vs-supplyregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-pull-downregulator-over-current-protectionqcom,ocp-max-retriesqcom,ocp-retry-delayqcom,vs-soft-start-strengthregulator-initial-mode#dma-cellsremote-endpointcpupower-domainsassigned-clock-parentsqcom,dsi-phy-indexqcom,smd-edgeqcom,smd-channelsvdd_l1_l3-supplyvdd_l2_lvs1_2_3-supplyvdd_l4_l11-supplyvdd_l5_l7-supplyvdd_l6_l12_l14_l15-supplyregulator-always-onregulator-boot-onregulator-allow-set-loadregulator-system-loadregulator-namegpioenable-active-highserial0usid0usid4stdout-path