� ��Wa8R,(5Q�Aries/DENX M53EVK/!aries,imx53-m53evkdenx,imx53-m53evkfsl,imx53chosenaliases%,/soc/aips@60000000/ethernet@63fec000!6/soc/aips@50000000/gpio@53f84000!�"�okay�default�#codec@a !fsl,sgtl5000�  |$�$��31ssi@63fcc000 *!fsl,imx53-ssifsl,imx51-ssifsl,imx21-ssi�c��@i�0� tipgbaud �rxtx �disabledaudmux@63fd0000"!fsl,imx53-audmuxfsl,imx31-audmux�c�@�okay�default�%nand@63fdb000!fsl,imx53-nand�c����i�<�okay�default�&��hwssi@63fe8000 *!fsl,imx53-ssifsl,imx51-ssifsl,imx21-ssi�c��@i`�2� tipgbaud �./rxtx �disabledethernet@63fec000!fsl,imx53-fecfsl,imx25-fec�c��@iW�*** tipgahbptp�okay�default�'�rmiitve@63ff0000!fsl,imx53-tve�c�i\�Et ttvedi_sel �disabledportendpoint�(3 vpu@63ff4000!fsl,imx53-vpucnm,coda7541�c�@i �@?tperahb��)crypto@63ff8000!fsl,imx53-sahara�c��@i���tipgahbsram@f8000000 !mmio-sram����3)memory@70000000�memory�p � regulators !simple-busregulator@0!regulator-fixed��3P2V�0��0��3$regulator@1!regulator-fixed� �lcd-supply�0��0��3-regulator@3!regulator-fixed��vbus�LK@�LK@  3regulator@4!regulator-fixed� �usb_otg_vbus�LK@�LK@  3disp1!fsl,imx-parallel-displaybgr666�default�*display-timings800x480p60*H��6 >�F(SX_�i!u ��portendpoint�+3 backlight!pwm-backlight �, � � @����-leds !gpio-leds�default�.user1�user1 �/ �heartbeatuser2�user2 �/  �heartbeatsound1!fsl,imx53-m53evk-sgtl5000fsl,imx-audio-sgtl5000imx53-m53evk-sgtl5000�01^ MIC_INMic JackMic JackMic BiasLINE_INLine In JackHeadphone JackHP_OUTExt SpkLINE_OUT( #address-cells#size-cellsmodelcompatibleethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2device_typeregclocksclock-latencyvoltage-toleranceoperating-pointsportsinterrupt-controller#interrupt-cellsphandle#clock-cellsclock-frequencyinterrupt-parentinterruptsclock-names#phy-cellsstatusrangesresetsremote-endpointreg-namesinterrupt-namesbus-widthpinctrl-namespinctrl-0cd-gpioswp-gpiosdmasdma-names#sound-dai-cellsfsl,fifo-depthfsl,usbmiscfsl,usbphydr_modevbus-supplydisable-over-currentphy_type#index-cellsgpio-controller#gpio-cellsfsl,pinsgpr#pwm-cells#reset-cells#dma-cellsfsl,sdma-ram-script-nameidblocksirq-triggerst,sample-timest,mod-12bst,ref-selst,adc-freqst,ave-ctrlst,touch-det-delayst,settlingst,fraction-zst,i-drivepagesizeVDDA-supplyVDDIO-supplynand-bus-widthnand-ecc-modephy-modeiramregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-ongpiointerface-pix-fmtnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenvsync-activepwmsbrightness-levelsdefault-brightness-levelpower-supplylabellinux,default-triggerssi-controlleraudio-codecaudio-routingmux-int-portmux-ext-port